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c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 1 a n p e c r e s e r v e s t h e r i g h t t o m a k e c h a n g e s t o i m p r o v e r e l i a b i l i t y o r m a n u f a c t u r a b i l i t y w i t h o u t n o t i c e , a n d a d v i s e c u s t o m e r s t o o b t a i n t h e l a t e s t v e r s i o n o f r e l e v a n t i n f o r m a t i o n t o v e r i f y b e f o r e p l a c i n g o r d e r s . 1 m h z , h i g h - e f f i c i e n c y , s t e p - u p c o n v e r t e r w i t h l o a d d i s c o n n e c t i o n t h e a p w 7 2 1 2 i s a s y n c h r o n o u s r e c t i f i e r , f i x e d s w i t c h i n g f r e q u e n c y ( 1 m h z t y p i c a l ) , a n d c u r r e n t - m o d e s t e p - u p r e g u l a t o r . t h e d e v i c e a l l o w s u s e o f s m a l l i n d u c t o r s a n d o u t p u t c a p a c i t o r s f o r p o r t a b l e d e v i c e s . t h e c u r r e n t - m o d e c o n t r o l s c h e m e p r o v i d e s f a s t t r a n s i e n t r e s p o n s e a n d g o o d o u t p u t v o l t a g e a c c u r a c y . f e a t u r e s w i d e 0 . 8 v t o v o u t i n p u t v o l t a g e r a n g e l o w 1 . 0 5 v ( t y p i c a l ) s t a r t - u p v o l t a g e l o w 4 0 m a n o l o a d b i a s c u r r e n t 1 0 0 m a o u t p u t f r o m a s i n g l e a a c e l l i n p u t 2 5 0 m a o u t p u t f r o m a d u a l a a c e l l i n p u t i n t e r n a l s y n c h r o n o u s r e c t i f i e r u p t o 9 2 % e f f i c i e n c y <1 m a quiescent current during shutdown current-mode operation with internal compen- sation - stable with ceramic output capacitors - fast line transient response f i x e d 1 m h z o s c i l l a t o r f r e q u e n c y 1 . 2 a c u r r e n t - l i m i t p r o t e c t i o n built-in soft-start over-temperature protection with hysteresis available in a 2 m m x 2 m m t d f n 2 x 2 - 8 and tsot- 23-6a packages halogen and lead free available (rohs compliant) a p p l i c a t i o n s g e n e r a l d e s c r i p t i o n c e l l p h o n e a n d s m a r t p h o n e p d a , p m p , a n d m p 3 d i g i t a l c a m e r a b o o s t r e g u l a t o r the apw7212 also includes current-limit and over-tem- perature shutdown to prevent damage in the event of an output overload. the apw7212 is available in 2mmx2mm tdfn2x2-8 and tsot-23-6a packages. s i m p l i f i e d a p p l i c a t i o n c i r c u i t at light loads, the apw7212 will automatically enter in pulse frequency modulation(pfm) operation to reduce the dominant switching losses. during pfm operation, the ic consumes very low quiescent current and main- tains high efficiency over the complete load range. the device has a 1.05v start-up voltage and can operate with input voltage down to 0.8v after start-up. p i n c o n f i g u r a t i o n 1 6 5 4 3 2 8 7 sw gnd gnd ps vout fb vin en tdfn2x2-8 (top view) 4 en 6 vin gnd 2 5 vout fb 3 sw 1 tsot-23-6a (top view) vin sw v out en vout fb 3 8 4 1 2 c2 22 m f c1 4.7 m f r2 v in 0.8 v to v out r1 apw7212 gnd l1 4.7 m h 6 ps 5 pfm/ pwm pwm gnd 7
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 2 symbol parameter rating unit v in vin supply voltage (vin to gnd) - 0.3 ~ 7 v v out vout to gnd voltage - 0.3 ~ 7 v v sw sw to gnd voltage - 0.3 ~ 7 v fb, en and ps to gnd voltage - 0.3 ~ 7 v t j maximum junction temperature 150 c t stg storage temperat ure - 65 ~ 150 c t s dr maximum lead soldering temperature , 10 seconds 260 c a b s o l u t e m a x i m u m r a t i n g s ( n o t e 1 ) n o t e 1 : a b s o l u t e m a x i m u m r a t i n g s a r e t h o s e v a l u e s b e y o n d w h i c h t h e l i f e o f a d e v i c e m a y b e i m p a i r e d . e x p o s u r e t o a b s o l u t e m a x i m u m r a t i n g c o n d i t i o n s f o r e x t e n d e d p e r i o d s m a y a f f e c t d e v i c e r e l i a b i l i t y . o r d e r i n g a n d m a r k i n g i n f o r m a t i o n n o t e : a n p e c l e a d - f r e e p r o d u c t s c o n t a i n m o l d i n g c o m p o u n d s / d i e a t t a c h m a t e r i a l s a n d 1 0 0 % m a t t e t i n p l a t e t e r m i n a t i o n f i n i s h ; w h i c h a r e f u l l y c o m p l i a n t w i t h r o h s . a n p e c l e a d - f r e e p r o d u c t s m e e t o r e x c e e d t h e l e a d - f r e e r e q u i r e m e n t s o f i p c / j e d e c j - s t d - 0 2 0 d f o r m s l c l a s s i f i c a t i o n a t l e a d - f r e e p e a k r e f l o w t e m p e r a t u r e . a n p e c d e f i n e s ? g r e e n ? t o m e a n l e a d - f r e e ( r o h s c o m p l i a n t ) a n d h a l o g e n f r e e ( b r o r c l d o e s n o t e x c e e d 9 0 0 p p m b y w e i g h t i n h o m o g e n e o u s m a t e r i a l a n d t o t a l o f b r a n d c l d o e s n o t e x c e e d 1 5 0 0 p p m b y w e i g h t ) . symbol parameter typical value unit q ja thermal resistance - junction to ambient (note 2 ) tdfn2x2 - 8 tsot - 23 - 6a 85 220 c/w note 2: q ja is measured with the component mounted on a high effective thermal conductivity test board in free air. the exposed pad of package is soldered directly on the pcb. t h e r m a l c h a r a c t e r i s t i c s package code qb : tdfn2x2-8 ct : tsot-23-6a operating ambient temperature range i : -40 to 85 o c handling code tr : tape & reel assembly material g: halogen and lead free device x - date code apw7212 handling code temperature range package code assembly material apw7212 qb: 7212 x x - date code apw7212 ct: w12x
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 3 r e c o m m e n d e d o p e r a t i n g c o n d i t i o n s ( n o t e 3 ) symbol parameter range unit v in vin input voltage 0.8 ~ v out v eb, en and ps to gnd voltage - 0.3 ~ v out +0.3 v l inductor 1.5 ~ 10 m h c in input capacitor 4.7 ~ m f c out output capacitor 3.7 ~ m f t a ambient temperature - 40 ~ 85 c t j junction tempe rature - 40 ~ 125 c n o t e 3 : r e f e r t o t h e a p p l i c a t i o n c i r c u i t f o r f u r t h e r i n f o r m a t i o n . e l e c t r i c a l c h a r a c t e r i s t i c s refer to the typical application circuits. these specifications apply over v in = 1.2v, v out = 3.3v, i out = 0ma, t a = -40c to 85c, unless otherwise noted. typical values are at t a = 25c. apw7 212 symbol parameter test conditions min. typ. max. unit supply voltage and current minimum start - up voltage r l = 3k w - 1.05 1.15 v in minimum operating voltage after stat - up v en = v in - 0.8 0.9 v v out output voltage range 1.8 - 5.5 v i dd1 no switching quiescent current measured form vout, v fb = 1.3v, v out = 3.3v , t a =25 c - 40 60 i dd2 vin quiescent current measured from vin, v in = 1.2v , t a =25 c - 0.5 1 m a i sd shutdown current v en = gnd, v in = 1.2v - 0.1 1 m a reference and output vol tages t a = 0 ~ 85 c - 1.5% 1.23 +1.5% v ref regulated feedback voltage t a = - 40 ~ 85 c - 2% - +2% v i fb fb input current v fb = 1.3v - 50 - 50 na internal power switch f sw switching frequency fb = gnd 0.75 1 1.25 m hz v out = 3.3v - 0.35 - r n - fet n - fet switch on resistance v out = 5v - 0.3 - w v out = 3.3v - 0.6 - r p - fet p - fet switch on resistance v out = 5v - 0.55 - w n - fet switch leakage current v sw = 5v - 0.05 1 m a p - fet switch leakage current v sw = 0v, v out = 5v - 0.05 1 m a i lim n - fet switch current - limit 0.9 1.2 - a dead - time (note 4) - 10 - ns d max sw maximum duty cycle 80 85 95 %
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 4 e l e c t r i c a l c h a r a c t e r i s t i c s ( c o n t . ) apw7 212 symbol parameter test conditions min. typ. max. unit control stage en en input low threshold - - 0.4 en input high threshold 1 - - v ps ps input low threshold - - 0.4 ps input high threshold 1 - - v i en en input leakage curre nt v en = 5v or gnd - 0.4 1 m a i ps ps input leakage current v ps = 5v or gnd - 0.1 1 m a over - temperature protection t otp over - temperature protection (note 4) t j rising - 150 - c over - temperature protection hysteresis (note 4) - 30 - c refer to the typical application circuits. these specifications apply over v in = 1.2v, v out = 3.3v, i out = 0ma, t a = -40c to 85c, unless otherwise noted. typical values are at t a = 25c. n o t e 4 : g u a r a n t e e d b y d e s i g n , n o t p r o d u c t i o n t e s t e d .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 5 t y p i c a l o p e r a t i n g c h a r a c t e r i s t i c s ( r e f e r t o t h e a p p l i c a t i o n c i r c u i t i n t h e s e c t i o n " t y p i c a l a p p l i c a t i o n c i r c u i t s " , v i n = 1 . 5 v , v o u t = 3 . 3 v , t a = 2 5 o c u n l e s s o t h e r w i s e s p e c i f i e d ) efficiency vs. load current e f f i c i e n c y ( % ) load current, i out (ma) 0 10 20 30 40 50 60 70 80 90 100 0.1 1 10 100 1000 . v in =1.8v v in =0.9v v in =1.2v v in =2.4v v out = 3.3v l = 4.7 m h c out = 22 m f efficiency vs. load current e f f i c i e n c y ( % ) load current, i out (ma) 0 10 20 30 40 50 60 70 80 90 100 0.1 1 10 100 1000 v in =1.2v v in =2.4v v in =1.8v v out = 4v l = 4.7 m h c out = 22 m f e f f i c i e n c y ( % ) efficiency vs. load current load current, i out (ma) 0 10 20 30 40 50 60 70 80 90 100 0.1 1 10 100 1000 v in =3.6v v in =2.4v v in =1.2v v in =1.8v v out = 5v l = 4.7 m h c out = 22 m f no load input current vs. supply voltage n o l o a d i n p u t c u r r e n t , i i n ( u a ) supply voltage, v in (v) 0 50 100 150 200 250 300 350 400 0 0.5 1 1.5 2 2.5 3 3.5 v out = 3.3v l = 4.7 m h c out = 22 m f l o a d c u r r e n t , i o u t ( m a ) start-up voltage vs. load current start-up voltage, v in (v) 0 50 100 150 200 250 300 0 0.5 1 1.5 2 2.5 3 3.5 v out = 3.3v l = 4.7 m h c out = 22 m f
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 6 o p e r a t i n g w a v e f o r m s ( r e f e r t o t h e a p p l i c a t i o n c i r c u i t i n t h e s e c t i o n ? t y p i c a l a p p l i c a t i o n c i r c u i t s ? , v i n = 1 . 5 v , v o u t = 3 . 3 v , t a = 2 5 o c u n l e s s o t h e r w i s e s p e c i f i e d ) time: 500n s/div normal operating waveform 3 2 v out, 10mv/div, ac v lx , 2v/div, dc i l , 200ma/div i out = 200ma 2 1 load transient response v out ,200mv/div, ac i out , 100ma/div 100ma l=4.7 h, v in =1.5v, c out =22 m f time: 100 m s/div 200ma load transient response 2 1 time: 100 m s/div v out ,200mv/div, ac 10ma 110ma i out , 0.1a/div l=4.7 h, v in =1.5v, c out =22 m f time: 500 m s/div no load start-up 2 1 3 v out , 1v/div i in , 0.2a/div v en l=4.7 h, v in =1.5v, i out =0ma line transient response 2 1 v out, 200mv/div,ac v in, 0.5v/div 1.5v 2.5v i out = 100ma time: 100 m s/div time: 10 m s/div normal operating waveform 3 2 1 v out, 10mv/div, ac v lx , 2v/div, dc i l , 500ma/div i out = 20ma
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 7 p i n d e s c r i p t i o n p in no. tdfn2x2 - 8 tsot - 23 - 6a name function 1 6 vin s upply voltage input pin. 2 5 vout converter output and control circuitry bias supply pin. 3 4 en enable control i nput. forcing this pin above 1. 0 v enables the device . forcing this pin below 0. 4 v t o shut it down. in shutdown, all f unctions are disabled to decrease the supply current below 1 m a. 4 3 fb feedback input. the device senses feedback voltage via fb and regulate the voltage at 1.23 v. connecting fb with a resistor - divider from the output set the output voltage in the range from 1.8 t o 5.5 v. 5 - ps pulse skipping mode selection. pull ing this pin to logic high to force boost converter enter pwm mode. pulling it low to automatic switch under pfm (pulse frequency mode) and pwm mode . do not leave this pin floating. this pin internally connects to gnd for tsot - 23 - 6 package. 6, 7 2 gnd pow er and signal ground pin. 8 1 sw switch pin . connect this pin to inductor. - - exposed pad connected this pad to gnd .
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 8 b l o c k d i a g r a m t y p i c a l a p p l i c a t i o n c i r c u i t vin sw v out en vout fb 3 8 4 1 2 c2 22 m f c1 4.7 m f r2 v in 0.8 v to v out r1 apw7212 gnd l1 4.7 m h 6 ps 5 pfm/ pwm pwm gnd 7 v max control oscillator logic control vin gnd sw over- temperature protection eamp comp i cmp soft- start error amplifier current sense amplifier current- limit slope compensation low voltage start-up vout zero-crossing comparator ps shutdown control mux gate control fb en from vout from v max control v ref 1.23v (apw7212ct only) s
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 9 f u n c t i o n d e s c r i p t i o n m a i n c o n t r o l l o o p s t a r t - u p t h e a p w 7 2 1 2 i s a c o n s t a n t f r e q u e n c y , s y n c h r o n o u s r e c t i f i e r , a n d c u r r e n t - m o d e s w i t c h i n g r e g u l a t o r . i n n o r m a l o p e r a t i o n , t h e i n t e r n a l n - c h a n n e l p o w e r m o s f e t i s t u r n e d o n e a c h c y c l e w h e n t h e o s c i l l a t o r s e t s a n i n t e r n a l r s l a t c h a n d t u r n e d o f f w h e n a n i n t e r n a l c o m p a r a t o r ( i c m p ) r e s e t s t h e l a t c h . t h e p e a k i n d u c t o r c u r r e n t w h i c h i c m p r e s e t s t h e r s l a t c h i s c o n t r o l l e d b y t h e v o l t a g e o n t h e c o m p n o d e , w h i c h i s t h e o u t p u t o f t h e e r r o r a m p l i f i e r ( e a m p ) . a n e x t e r n a l r e s i s t i v e d i v i d e r c o n n e c t e d b e t w e e n v o u t a n d g r o u n d a l l o w s t h e e a m p t o r e c e i v e a n o u t p u t f e e d b a c k v o l t a g e v f b a t f b p i n . w h e n t h e l o a d c u r r e n t i n c r e a s e s , i t c a u s e s a s l i g h t l y d e c r e a s e i n v f b r e l a t i v e t o t h e 1 . 2 3 v r e f e r e n c e , w h i c h i n t u r n c a u s e s t h e c o m p v o l t - a g e t o i n c r e a s e u n t i l t h e a v e r a g e i n d u c t o r c u r r e n t m a t c h e s t h e n e w l o a d c u r r e n t . a s t a r t - u p o s c i l l a t o r c i r c u i t i s i n t e g r a t e d i n t h e a p w 7 2 1 2 . w h e n t h e d e v i c e e n a b l e s , t h e c i r c u i t p u m p s t h e o u t p u t v o l t a g e h i g h . o n c e t h e o u t p u t v o l t a g e r e a c h e s 1 . 6 v ( t y p ) , t h e m a i n d c - d c c i r c u i t r y t u r n s o n a n d b o o s t s t h e o u t p u t v o l t a g e t o t h e f i n a l r e g u l a t i o n v o l t a g e . automatic pfm/pwm mode switch the apw7212 is a fixed frequency pwm peak current modulation control step-up converter. at light loads, the apw7212 will automatically enter in pulse frequency modulation operation to reduce the dominant switching losses. in pfm operation, the inductor current may reach zero or reverse on each pulse. a zero current comparator turns off the p-channel synchronous mosfet, forcing dcm(discontinuous current mode) operation at light load. these controls get very low quiescent current, help to maintain high efficiency over the complete load range. synchronous rectification the internal synchronous rectifier eliminates the need for an external schottky diode, thus reducing cost and board space. during the cycle off-time, the p-fet turns on and shunts the fet body diode. as a result, the syn- chronous rectifier significantly improves efficiency with- out the addition of an external component. conversion efficiency can be as high as 92%. load disconnect driving en to ground places the apw7212 in shutdown mode. when in shutdown, the internal power mosfet turns off, all internal circuitry shuts down and the quies- cent supply current reduces to 1 m a maximum. a special circuit is applied to disconnect the load from the input during shutdown the converter. in conventional syn- chronous rectifier circuits, the back-gate diode of the high- side p-fet is forward biased in shutdown and allows current flowing from the battery to the output. however, this device uses a special circuit, which takes the cath- ode of the back-gate diode of the high-side p-fet and disconnects it from the source when the regulator is shutdown. the benefit of this feature for the system de- sign engineer is that the battery is not depleted during shutdown of the converter. no additional components must be added to the design to make sure that the bat- tery is disconnected from the output of the converter. current-limit protection the apw7212 monitors the inductor current, flowing through the n-fet, and limits the current peak at current- limit level to prevent loads and the apw7212 from dam- ages during overload conditions. over-temperature protection (otp) the over-temperature circuit limits the junction tempera- ture of the apw7212. when the junction temperature ex- ceeds 150 o c, a thermal sensor turns off the both n-fet and p-fet, allowing the devices to cool. the thermal sensor allows the converters to start a soft-start process and regulate the output voltage again after the junction temperature cools by 30 o c. the otp is designed with a 30 o c hysteresis to lower the average junction tempera- ture (t j ) during continuous thermal overload conditions, increasing the lifetime of the device.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 1 0 the input capacitor (c in ) reduces the current peaks drawn from the input supply and reduces noise injection into the ic. the reflected ripple voltage will be smaller with larger c in . for reliable operation, it is recommended to select the capacitor voltage rating at least 1.2 times higher than the maximum input voltage. the capacitors should be placed close to the vin and gnd. a p p l i c a t i o n i n f o r m a t i o n i n p u t c a p a c i t o r s e l e c t i o n i n d u c t o r s e l e c t i o n w h e r e v i n = i n p u t v o l t a g e v o u t = o u t p u t v o l t a g e f s w = s w i t c h i n g f r e q u e n c y i n m h z i o u t = m a x i m u m o u t p u t c u r r e n t i n a m p . b = e f f i c i e n c y d i l / i l ( a v g ) = ( 0 . 3 t o 0 . 5 t y p i c a l ) t o a v o i d s a t u r a t i o n o f t h e i n d u c t o r , t h e i n d u c t o r s h o u l d b e r a t e d a t l e a s t f o r t h e m a x i m u m i n p u t c u r r e n t o f t h e c o n - v e r t e r p l u s t h e i n d u c t o r r i p p l e c u r r e n t . t h e m a x i m u m i n - p u t c u r r e n t i s c a l c u l a t e d a s b e l o w : t h e p e a k i n d u c t o r c u r r e n t i s c a l c u l a t e d a s b e l o w : o u t p u t c a p a c i t o r s e l e c t i o n t h e c u r r e n t - m o d e c o n t r o l s c h e m e o f t h e a p w 7 2 1 2 a l - l o w s t h e u s e o f t i n y c e r a m i c c a p a c i t o r s . t h e h i g h e r c a - p a c i t o r v a l u e p r o v i d e s t h e g o o d l o a d t r a n s i e n t s r e s p o n s e . c e r a m i c c a p a c i t o r s w i t h l o w e s r v a l u e s h a v e t h e l o w e s t o u t p u t v o l t a g e r i p p l e a n d a r e r e c o m m e n d e d . i f r e q u i r e d , t a n t a l u m c a p a c i t o r s m a y b e u s e d a s w e l l . t h e o u t p u t r i p p l e i s t h e s u m o f t h e v o l t a g e s a c r o s s t h e e s r a n d t h e i d e a l o u t p u t c a p a c i t o r . for high efficiencies, the inductor should have a low dc resistance to minimize conduction losses. especially at high-switching frequencies the core material has a higher impact on efficiency. when using small chip inductors, the efficiency is reduced mainly due to higher inductor core losses. this needs to be considered when select- ing the appropriate inductor. the inductor value deter- mines the inductor ripple current. the larger the inductor value, the smaller the inductor ripple current and the lower the conduction losses of the converter. conversely, larger inductor values cause a slower load transient response. a reasonable starting point for setting ripple current, d i l , is 30% to 50% of the average inductor current. the rec- ommended inductor value can be calculated as below: ( ) ? ? ? ? ? d h - ? ? ? ? ? 3 avg l l ) max ( out sw in out 2 out in i i i f v v v v l h = in out ) max ( out ) max ( in v v i i ( ) sw out in out in ) max ( in peak f l v v v v 2 1 i i - + = v in v ou t i l n-fet lx i ou t i sw c in c ou t i in i lim i l i peak i in i out i sw i d d1 d i l esr ? ? ? ? ? - @ d sw out in out out out cout f v v v c i v esr peak esr r i v @ d g v o u t = g v e s r + g v c o u t
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 1 1 a p p l i c a t i o n i n f o r m a t i o n ( c o n t . ) output voltage setting a resistive divider sets the output voltage. the external resistive divider is connected to the output, allowing re- mote voltage sensing as shown in ?typical application circuits?. a suggestion of the maximum value of r1 is 2m w and r2 is 600k w to keep the minimum current that provides enough noise rejection ability through the re- sistor divider. the output voltage can be calculated as below: ? ? ? ? ? + = ? ? ? ? ? + = 2 r 1 r 1 23 . 1 2 r 1 r 1 v v ref out layout consideration for all switching power supplies, the layout is an impor- tant step in the design, especially at high peak currents and switching frequencies. if the layout is not done carefully, the regulator may show noise problems and duty cycle jitter. 1. since the vout supplies ic bias voltage, the output capacitor should be placed close to the vout and gnd. connecting the capacitor with vout and gnd pins by short and wide tracks without using any via holes for good filtering and minimizing the voltage ripple. 2. to minimize copper trace connections that can inject noise into the system, the inductor should be placed as close as possible to the sw pin to minimize the noise coupling into other circuits. 3. since the feedback pin and network is a high imped- ance circuit the feedback network should be routed away from the inductor. the feedback pin and feed- back network should be shielded with a ground plane or trace to minimize noise coupling into this circuit. 4. a star ground connection or ground plane minimizes ground shifts and noise is recommended. where i peak is the peak inductor current. for ceramic ca- pacitor application, the output voltage ripple is dominated by the d v cout . when choosing the input and output ce- ramic capacitors, the x5r or x7r with their good tem- perature and voltage characteristics are recommended. o u t p u t c a p a c i t o r s e l e c t i o n ( c o n t . ) l a y o u t c o n s i d e r a t i o n 1 6 5 4 3 2 8 7 sw gnd gnd ps vout r2 r 1 c1 c2 l 1 pfm/pwm pwm vin via to vin apw7212 layout suggestion gnd r1 r 2 via to v out l 1 v out v en gnd fb c1 c2 sw v in via to v in apw7212 layout suggestion
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 1 2 p a c k a g e i n f o r m a t i o n t d f n 2 x 2 - 8 s y m b o l min. max. 0.80 0.00 0.18 0.30 1.00 1.60 0.05 0.60 a a1 b d d2 e e2 e l millimeters a3 0.20 ref tdfn2x2-8 0.30 0.45 1.00 0.008 ref min. max. inches 0.031 0.000 0.007 0.012 0.039 0.063 0.024 0.012 0.018 0.70 0.039 0.028 0.002 0.50 bsc 0.020 bsc 1.90 2.10 0.075 0.083 1.90 2.10 0.075 0.083 k 0.20 0.008 note : 1. followed from jedec mo-229 wccd-3. e l k e 2 pin 1 corner d2 a3 a1 b a e d
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 1 3 p a c k a g e i n f o r m a t i o n t s o t - 2 3 - 6 a note : dimension d and e1 do not include mold flash, protrusions or gate burrs. mold flash, protrusion or gate burrs shall not exceed 10 mil per side. d e e1 b e 1 e c see view a a 2 a 1 a view a l 0 . 2 5 seating plane gauge plane 0.020 0.008 0.004 0.024 0.035 0.039 max. 0.30 l 0 e e e1 e1 d c b 0.08 0.30 0.012 0.60 8 0 8 0.95 bsc 1.90 bsc 0.50 0.20 0.075 bsc 0.037 bsc 0.012 0.003 millimeters min. s y m b o l a1 a2 a 0.01 0.70 tsot-23-6a max. 0.90 0.10 1.00 min. 0.000 0.028 inches 2.70 3.10 0.106 0.122 2.60 3.00 0.102 0.118 1.40 1.80 0.055 0.071 0.70 0.028 q
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 1 4 application a h t1 c d d w e1 f 178.0 ? 2.00 50 min. 8.4+2.00 - 0.00 13.0+0.50 - 0.20 1.5 min. 20.2 min. 8.0 ? 0.20 1.75 ? 0.10 3.50 ? 0.05 p 0 p1 p 2 d 0 d1 t a 0 b 0 k 0 tdfn2x2 - 8 4.0 ? 0.10 4.0 ? 0.10 2.0 ? 0.05 1.5+0.10 - 0.00 1.5 min. 0.6+0.00 - 0 .4 3.35 min 3.35 min 1.30 ? 0.20 application a h t1 c d d w e1 f 178.0 ? 2.00 50 min. 8.4+2.00 - 0.00 13.0+0.50 - 0.20 1.5 min. 20.2 min. 8.0 ? 0.30 1.75 ? 0.10 3.5 ? 0.05 p 0 p1 p 2 d 0 d1 t a 0 b 0 k 0 tsot - 23 - 6a 4.0 ? 0.10 4.0 ? 0.10 2.0 ? 0.05 1.5+0.10 - 0.00 1.0 min. 0.6+0.00 - 0.40 3.20 ? 0.20 3.10 ? 0.20 1.50 ? 0.20 (mm) c a r r i e r t a p e & r e e l d i m e n s i o n s h t1 a d a e 1 a b w f t p0 od0 b a0 p2 k0 b 0 section b-b section a-a od1 p1
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 1 5 d e v i c e s p e r u n i t package type unit quantity tdfn2 x 2 - 8 tape & reel 3000 t sot - 23 - 6a tape & reel 3000 t a p i n g d i r e c t i o n i n f o r m a t i o n t d f n 2 x 2 - 8 t s o t - 2 3 - 6 user direction of feed user direction of feed aaax aaax aaax aaax aaax aaax aaax
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 1 6 c l a s s i f i c a t i o n p r o f i l e c l a s s i f i c a t i o n r e f l o w p r o f i l e s profile feature sn - pb eutectic assembly pb - free assembly preheat & soak temperature min (t smin ) temperature max (t smax ) time (t smin to t smax ) ( t s ) 100 c 150 c 60 - 120 seconds 150 c 200 c 60 - 1 2 0 seconds average ramp - up rate (t smax to t p ) 3 c/second ma x. 3 c/second max. liquidous temperature ( t l ) time at l iquidous (t l ) 183 c 60 - 150 seconds 217 c 60 - 150 seconds peak package body temperature (t p ) * see classification temp in table 1 see classification temp in table 2 time (t p ) ** within 5 c of the spe cified c lassification t emperature ( t c ) 2 0 ** seconds 3 0 ** seconds average r amp - down rate (t p to t smax ) 6 c/second max. 6 c/second max. time 25 c to p eak t emperature 6 minutes max. 8 minutes max. * tolerance for peak profile temperature (t p ) is defined as a supplier minimum and a user maximum. ** tolerance for time at peak profile temperature (t p ) is defined as a supplier minimum and a user maximum.
c o p y r i g h t ? a n p e c e l e c t r o n i c s c o r p . r e v . a . 2 - f e b . , 2 0 1 1 a p w 7 2 1 2 w w w . a n p e c . c o m . t w 1 7 c l a s s i f i c a t i o n r e f l o w p r o f i l e s ( c o n t . ) table 2. pb - free process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 350 - 2000 volume mm 3 >2000 <1.6 mm 260 c 260 c 260 c 1.6 mm ? 2.5 mm 260 c 250 c 245 c 3 2.5 mm 250 c 245 c 245 c table 1. snpb eutectic process ? classification temperatures (tc) package thickness volume mm 3 <350 volume mm 3 3 350 <2.5 mm 235 c 22 0 c 3 2.5 mm 220 c 220 c test item method description solderability jesd - 22, b102 5 sec, 245 c holt jesd - 22, a108 1000 hrs, bias @ tj=125 c pct jesd - 22, a102 168 hrs, 100 % rh, 2atm , 121 c tct jesd - 22, a104 500 cycles, - 65 c~150 c hbm mil - std - 883 - 3015.7 vhbm ? 2kv mm jesd - 22, a1 15 vmm ? 200v latch - up jesd 78 10ms, 1 tr ? 100ma r e l i a b i l i t y t e s t p r o g r a m c u s t o m e r s e r v i c e a n p e c e l e c t r o n i c s c o r p . head office : no.6, dusing 1st road, sbip, hsin-chu, taiwan, r.o.c. tel : 886-3-5642000 fax : 886-3-5642050 t a i p e i b r a n c h : 2 f , n o . 1 1 , l a n e 2 1 8 , s e c 2 j h o n g s i n g r d . , s i n d i a n c i t y , t a i p e i c o u n t y 2 3 1 4 6 , t a i w a n t e l : 8 8 6 - 2 - 2 9 1 0 - 3 8 3 8 f a x : 8 8 6 - 2 - 2 9 1 7 - 3 8 3 8

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